Signal\Logical\Boolean
Domains: Discrete, Continuous. Size: 1-D. Allowed in: Block Diagrams.
This model compares two input real signals and outputs the result as a boolean output according to the following table:
inputs |
output |
input1 <= input 2 |
true |
input1 > input 2 |
false |
Port name |
Data type |
Description |
Range |
Inputs |
|||
input1 |
real |
First input |
real |
input2 |
real |
Second input |
real |
Outputs |
|||
output |
boolean |
Result of the input1 <= input2 |
false/true |