Nand

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Nand

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Signal\Logical\Real

Use

Domains: Discrete, Continuous. Size: 1-D. Allowed in: Block Diagrams.

Implementations

This has 8 implementations varying from a 2-input NAND to a 9-input NAND.

inputs_2
inputs_3
inputs_4
inputs_5
inputs_6
inputs_7
inputs_8
inputs_9

Description

The output signal of this model is according the truth table below:

 

input1

input2

output

false

false

true

false

true

true

true

false

true

true

true

false

 

with

 

 

false

true

inputs

<= 0.5

> 0.5

output

0

1

 

The output signal for the other NAND implementations follows a similar pattern. The output signal is only false when all input signals are equal to true.

Interface

Port name

Data type

Description

Range

Inputs




input1

real

First AND input

<= 0.5 / > 0.5

input2

real

Second AND input

<= 0.5 / > 0.5

Outputs



 

output

real

Result of the NAND operation

1 or 0

Restrictions

This block operates with real inputs. Boolean inputs can also be used but will lead to a warning during processing.